Sony Semiconductor Solutions Corporation will utilize the MEMS/semiconductor processing technology it has cultivated over many years as well as its proven results in MEMS commissioning, to provide consistent, comprehensive MEMS foundry services from prototyping to mass-production. We will support the MEMS development and production needs of our customers.
Wafer process development (development, engineering samples, low ~ high volume mass production)
Bulk process (including SOI), surface process, semiconductor process.
Sony Semiconductor Manufacturing Corporation, Kagoshima Technology Center
MEMS Foundry Customer Engagement Flow
Services and equipment
|MEMS Foundry service (as of Apr.2022)|
|Location||Kirishima City, Kagoshima Prefecture, Japan|
|Clean class||Class 1-1000|
|Production capacity||Small volume engineering samples - mass production|
|Services||Process optimization, Engineering samples, Mass production|
|ISO, etc.||ISO9001, ISO14001|
|Development / Production experience||various sensors, actuators, optics|
|Process technology||Bulk processing including SOI, Cavity-SOI, Surface processing|
|Photolythography||Stepper, Double sided aligner, Coater, Developer|
|Heat treatment / diffusion||Diffusion, Ionic diffusion|
|Deposition||LPCVD, PCVD, Sputter, Vapor deposition, Doped Poly, Epi Poly|
|Dry etch||RIE, DeepRIE, Asher|
|Wet etch||HF, KOH, Resist removal|
|Cleaning||RCA, Organic cleaning|
|Other||Plating, Lift off|
|LowStress SiN, LowStress Poly, LowStress Epi Si|
|Design / Analysis||Analysis environment|
|Measurement / Evaluation||MEMS measurement, Evaluation environment|
Support for handling a wide range of materials
We can also accommodate various other device structures, so please consult with us as necessary.
◆TSV (Through Silicon Via)
One type of mounting technology, which refers to an electrode that vertically penetrates the interior of a silicon chip. If multiple chips are to be stacked and fit into a single package, connecting upper and lower chips to each other with this penetrating (through) electrode can be expected to reduce package sizes and improve reliability.
・High aspect ratio TSV
◆WLP (Wafer Level Package)
Wafer bonding technology can reduce the size of MEMS chips that contain packages.
・Au - Si Eutectic Bonding
・Au - Au Bonding
・Glass Frit Bonding
◆Deep RIE Process
“Deep RIE” refers to one type of reactive ion etching (RIE) that has a high aspect ratio (narrow and deep). Due to this characteristic, it is also known as “high aspect ratio etching.”
It is a leading type of production technology for bulk micromachining of MEMS.
・High aspect ratios
・Various taper angles
◆Epi Poly Process
It is possible to form an Epi Poly layer on a structure and then form other additional structures, so complex device configurations can be created.
For inquiries about Sony Semiconductor Solutions Group and products / solutions, specifications, quotation / purchase requests, etc., please contact us using the Inquiry form from the button below.